Hacker News front pageFEX-Emu31 min readintermediate
The scourge of x86 emulation
Summary
The article explains why emulating x86's strict TSO memory model on ARM's weak model is costly, shows microbenchmark results for acquire/release vs. LRCPC loads, and describes how newer ARM extensions and Apple Silicon's TSO mode restore performance.
- Mapping every x86 load/store to ARM acquire/release instructions can degrade performance dramatically on many CPUs (e.g., AmpereOne).
- ARMv8.3's LRCPC extension provides load instructions that match x86‑TSO semantics with near‑baseline performance, and FEX switches to them when detected.
- Apple Silicon implements a thread‑wide TSO mode, allowing regular loads/stores to behave like x86‑TSO and eliminating the overhead seen on other ARM CPUs.
- Split‑lock (unaligned atomic) accesses remain problematic for emulation because they can cause tearing and trigger kernel slowdowns.
Engineers building x86 emulators or porting x86 software to ARM need to understand the memory‑model mismatch and the hardware features that can mitigate its performance impact.
6/10
