Hacker News front pageView all posts by Daniel Lemire2 min readintermediate
How did AMD Ryzen get 50% faster in two years?
Summary
AMD’s Ryzen 7 desktop CPUs (Zen 3 → Zen 5) gained ~50 % performance in two years by widening the core (dispatch width 6→8, integer ALUs 4→6, reorder buffer 256→448), expanding caches (L2 512 KB→1 MB, L1 data 32 KB→48 KB), and doubling SIMD width (four 256‑bit units → four 512‑bit units). Clock speeds rose only 15 % (4.5 GHz→5.2 GHz). Transistor count grew ~50 % (≈11 B→16 B), mostly in the cores.
- Performance gains came from architectural widening rather than higher clock speeds.
- Larger L2/L1 caches and a bigger reorder buffer improve instruction-level parallelism.
- Doubling SIMD width and load/store bandwidth directly benefits data‑parallel workloads.
- AMD’s roadmap hints at even larger core counts and cache sizes in future Zen 6 designs.
Understanding where performance improvements come from helps engineers make realistic expectations for future CPU upgrades, informs software optimization strategies (e.g., leveraging wider SIMD), and provides context for hardware‑aware performance engineering.
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